Junior SoC IP Design Engineer, Google Cloud
- Tel Aviv, Israel
- Company career page
- Last checked yesterday
Mentioned in this posting
- Verilog
- GCP
- SIEM
Description
Minimum qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 1 year of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with design sign off and quality tools (Lint, CDC , etc.).