Senior SOC and IP Design Engineer, Google Cloud

Minimum qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with digital reasoning design principles, Register-Transfer Level (RTL) design concepts, and languages such as Verilog or System Verilog. Experience with reasoning synthesis techniques to optimize Register-Transfer Level (RTL) code, performance and power and design techniques. Experience in reasoning design and debug with Design Verification (DV).