SoC Power Architect, Google Cloud, Silicon

Minimum qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience. 10 years of experience in ASIC/SoC architecture or design with a focus on power optimizations. Experience developing or using power and performance modeling tools to drive architectural trade-offs. Experience in low-power design techniques (e.g., UPF/CPF, multi-voltage islands, power gating, clock gating, etc.) and on-chip power management IP.